Simulation of Real-Time Multiprocessor Scheduling with Overheads

International audience Numerous scheduling algorithms were and still are designed in order to handle multiprocessor architectures, raising new issues due to the complexity of such architectures. Moreover, evaluating them is difficult without a real and complex implementation. Thus, this paper presen...

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Bibliographic Details
Main Authors: Chéramy, Maxime, Déplanche, Anne-Marie, Hladik, Pierre-Emmanuel
Other Authors: Équipe Verification de Systèmes Temporisés Critiques (LAAS-VERTICS), Laboratoire d'analyse et d'architecture des systèmes (LAAS), Université Toulouse Capitole (UT Capitole), Université de Toulouse (UT)-Université de Toulouse (UT)-Institut National des Sciences Appliquées - Toulouse (INSA Toulouse), Institut National des Sciences Appliquées (INSA)-Université de Toulouse (UT)-Institut National des Sciences Appliquées (INSA)-Université Toulouse - Jean Jaurès (UT2J), Université de Toulouse (UT)-Université Toulouse III - Paul Sabatier (UT3), Université de Toulouse (UT)-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique (Toulouse) (Toulouse INP), Université de Toulouse (UT)-Université Toulouse Capitole (UT Capitole), Université de Toulouse (UT), Institut de Recherche en Communications et en Cybernétique de Nantes (IRCCyN), Mines Nantes (Mines Nantes)-École Centrale de Nantes (ECN)-Ecole Polytechnique de l'Université de Nantes (EPUN), Université de Nantes (UN)-Université de Nantes (UN)-PRES Université Nantes Angers Le Mans (UNAM)-Centre National de la Recherche Scientifique (CNRS)
Format: Conference Object
Language:English
Published: HAL CCSD 2013
Subjects:
real-time
scheduling
simulation
multiprocessor
overheads
cache
[INFO.INFO-ES]Computer Science [cs]/Embedded Systems
[INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation
Iceland
Online Access:https://hal.science/hal-00815502
https://hal.science/hal-00815502/document
https://hal.science/hal-00815502/file/camera-ready.pdf
Description
Summary:International audience Numerous scheduling algorithms were and still are designed in order to handle multiprocessor architectures, raising new issues due to the complexity of such architectures. Moreover, evaluating them is difficult without a real and complex implementation. Thus, this paper presents a tool that intends to facilitate the study of schedulers by providing an easy way of prototyping. Compared to the other scheduling simulators, this tool takes into account the impact of the caches through statistical models and includes direct overheads such as context switches and scheduling decisions.

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