Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials

The Abisko project aims to develop an energy-efficient spiking neural network (SNN) computing architecture and software system capable of autonomous learning and operation. The SNN architecture explores novel neuromorphic devices that are based on resistive-switching materials, such as memristors an...

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Bibliographic Details
Published in:The International Journal of High Performance Computing Applications
Main Authors: Vetter, Jeffrey S., Date, Prasanna, Fahim, Farah, Kulkarni, Shruti R., Maksymovych, Petro, Talin, A. Alec, Tallada, Marc Gonzalez, Vanna-iampikul, Pruek, Young, Aaron R., Brooks, David, Cao, Yu, Gu-Yeon, Wei, Lim, Sung Kyu, Liu, Frank, Marinella, Matthew, Sumpter, Bobby, Miniskar, Narasinga Rao
Language:unknown
Published: 2023
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Online Access:http://www.osti.gov/servlets/purl/1987763
https://www.osti.gov/biblio/1987763
https://doi.org/10.1177/10943420231178537
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Summary:The Abisko project aims to develop an energy-efficient spiking neural network (SNN) computing architecture and software system capable of autonomous learning and operation. The SNN architecture explores novel neuromorphic devices that are based on resistive-switching materials, such as memristors and electrochemical RAM. Equally important, Abisko uses a deep codesign approach to pursue this goal by engaging experts from across the entire range of disciplines: materials, devices and circuits, architectures and integration, software, and algorithms. Here, the key objectives of our Abisko project are threefold. First, we are designing an energy-optimized high-performance neuromorphic accelerator based on SNNs. This architecture is being designed as a chiplet that can be deployed in contemporary computer architectures and we are investigating novel neuromorphic materials to improve its design. Second, we are concurrently developing a productive software stack for the neuromorphic accelerator that will also be portable to other architectures, such as field-programmable gate arrays and GPUs. Third, we are creating a new deep codesign methodology and framework for developing clear interfaces, requirements, and metrics between each level of abstraction to enable the system design to be explored and implemented interchangeably with execution, measurement, a model, or simulation. As a motivating application for this codesign effort, we target the use of SNNs for an analog event detector for a high-energy physics sensor.