Multiband Dual-Meander Line Antenna for Body-Centric Networks’ Biomedical Applications by Using UMC 180 nm

A new, compact, on-chip antenna architecture for 5G body-centric networks’ (BCNs) applications is presented in this paper. The integrated antenna combines two turns of dual-meander lines (DML) on two stacked layers and a metal ground layer. The proposed DML antenna structure operated at resonant ban...

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Bibliographic Details
Published in:Electronics
Main Authors: Heba Shawkey, Dalia Elsheakh
Format: Text
Language:English
Published: Multidisciplinary Digital Publishing Institute 2020
Subjects:
WSN
DML
Online Access:https://doi.org/10.3390/electronics9091350
Description
Summary:A new, compact, on-chip antenna architecture for 5G body-centric networks’ (BCNs) applications is presented in this paper. The integrated antenna combines two turns of dual-meander lines (DML) on two stacked layers and a metal ground layer. The proposed DML antenna structure operated at resonant bands 22 GHz, 34 GHz, 44 GHz, and 58 GHz with an operating bandwidth up to 2 GHz at impedance bandwidth ≤−7.5 dB (VSWR—Voltage Standing Wave Ratio ≤ 2.5) and antenna gain about −20 dBi, −15 dBi, −10 dBi, and −1 dBi, respectively. Then it was compared with conventional single-meander line antenna. The proposed structure decreased the resonant frequency by 22%, increased number of tuning bands, and broadened the operating bandwidth by 25%, 15%, 10%, and 20% for the tuning bands to be a suitable choice for high-data -ate biomedical applications. Furthermore, the proposed antenna was simulated and studied for its performance on and inside the human body to test the integration effect in wearable equipment. The results showed that the antenna had acceptable performance in both locations. All simulations of the proposed antenna were done were done by using Ansys HFSS (high-frequency structure simulator) v.15 (Ansys, Canonsburg, PA, USA). The DML (Digital Microwave Links) antenna was fabricated by using UMC (United Microelectronics Corporation) 180 nm CMOS (Complementary Metal–Oxidesemi–Conductor) technology with a total area of 1150 µm × 200 µm and the results showed a good agreement between measured and simulated results.