DESIGN OF CARRY LOOK AHEAD ADDER USING SUB THRESHOLD DUAL MODE LOGIC

Abstract- Sub-threshold is a new paradigm in the digital VLSI design today. In Sub-threshold region, transistors are operated in sub-threshold voltage. This paper examine the Carry Look Ahead (CLA) Adder with dual mode logic (DML)principle, in which gates are operated in sub-threshold regime and com...

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Bibliographic Details
Main Authors: Ms. S. A, Ameena Nasreen, Dr. T. Kavitha
Other Authors: The Pennsylvania State University CiteSeerX Archives
Format: Text
Language:English
Subjects:
Critical Paths
Dynamic Mode
Non-Critical Paths
Conventional Basic Carry Look Ahead Adder
Static Mode
DML
Online Access:http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.678.167
http://www.ijaict.com/issue3/ijaict+2014070305.pdf
Description
Summary:Abstract- Sub-threshold is a new paradigm in the digital VLSI design today. In Sub-threshold region, transistors are operated in sub-threshold voltage. This paper examine the Carry Look Ahead (CLA) Adder with dual mode logic (DML)principle, in which gates are operated in sub-threshold regime and comparison of results with Conventional basic Carry look ahead adder. The number of gates in CLA is 5 including 2 XOR gates are used to perform sum & 2 NAND, an NOR gates are used to perform carry operations. It allows operation in two modes (Dual mode), very fast in the dynamic mode while energy efficient in the static mode. Critical paths are allowed to operate in dynamic mode. Non-critical paths are allowed to operate in static mode. In this result, speed, energy dissipation. Power consumption of DML based CLA is compared with conventional CLA.

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