| Summary: | . Arctic is a 4x4 packet routing chip being developed for the *T multiprocessor. Arctic can be used to implement a variety of staged networks and will be used to implement a fat tree network for *T. Arctic meets the requirements of *T and of a wide class of systems. This paper discusses the key features of Arctic. These include its buffering scheme which enables very high utilization of network links and its test and control system which provides error detection, limited error handling, and in-circuit testability. 1 Introduction Arctic is a four input four output packet router implemented on a Motorola H4CP gate array chip. Arctic has all the features necessary for use in a commercial multiboard multiprocessor such as *T [7, 8, 1]. It has high bandwidth (200 MBytes/sec/port), two priority levels, packet sizes up to 96 bytes, and extensive error detection; it has limited error handling, keeps statistics, can directly drive long PC traces, and provides significant testing suppor.
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