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Verástegui, Joaquín
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Design and implementation of a high speed interface system over Gigabit Ethernet based on FPGA for use on radar acquisition systems
by
Rojas, John
,
Verástegui
,
Joaquín
,
Milla, Marco
Published in
2017 Electronic Congress (E-CON UNI)
(2018)
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Related Subjects
Double buffering
FPGA
Gigabit Ethernet
LVDS
Threads of execution
UDP
http://purl.org/pe-repo/ocde/ford#1.05.01
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