Calculation of interpolation parameters in the comparator analog information converters

• Main Authors: Marcinkevičius, Albinas, Jasonis, Vaidas
• Format: Article in Journal/Newspaper
• Language: English
• Published: Technologija 2006
• Subjects: sami
• Online Access: http://dspace.vgtu.lt/handle/1/2477

The theoretical analysis of interpolation parameters evaluating the influence of folding circuits on the ADC speed and accuracy i; made in the paper. The analytical equations are derived and dependences of interpolation parameters on the number of converter bits the analog signal freųuency band width, and the folding coefficient are considered. Equations of for the interpolation error evaluation depending on the nonlinearity of transfer characteristics of differential amplifiers, folding and interpolation level, were derived. It ha; been determined that the speed ofthe interpolating ADC with folding amplifiers strongly depends on the inertness ofthe interpolatinj resistor divider circuit and the number of the converter bits. In order to increase the number of the converter bits with the sami interpolation coefficient, the circuit inertness must be reduced. A higher interpolation level can be achieved by reducing the speed ofthi converter. The interpolation error depends on the folding and interpolation coefficients. The lowest interpolation error (0.2 — 0.5 LSB can be achieved by selecting a certain linear part length of transfer characteristic of folding differential amplifiers. III. 3, bibl. 5 (ii English; summaries in English, Russian and Lithuanian).