Extending magny-cours cache coherence

• Published in: IEEE Transactions on Computers
• Main Authors: Ros Bardisa, Alberto, Cuesta Sáez, Blas Antonio, Fernández-Pascual, Ricardo, Gómez Requena, María Engracia, Acacio Sánchez, Manuel E., Robles Martínez, Antonio, García Carrasco, José Manuel, Duato Marín, José Francisco
• Other Authors: Universitat Politècnica de València. Departamento de Informática de Sistemas y Computadores - Departament d'Informàtica de Sistemes i Computadors, Ministerio de Educación y Ciencia, Generalitat Valenciana, Ministerio de Ciencia e Innovación
• Format: Article in Journal/Newspaper
• Language: English
• Published: Institute of Electrical and Electronics Engineers (IEEE) 2012
• Subjects: High-performance computing; Cache coherence; Coherence extension; Directory protocol; Scalability; Shared memory; Traffic filtering; ARQUITECTURA Y TECNOLOGIA DE COMPUTADORES; Carrasco; Martínez; Robles; The Pointers
• Online Access: http://hdl.handle.net/10251/36257; https://doi.org/10.1109/TC.2011.65

One cost-effective way to meet the increasing demand for larger high-performance shared-memory servers is to build clusters with off-the-shelf processors connected with low-latency point-to-point interconnections like HyperTransport. Unfortunately, HyperTransport addressing limitations prevent building systems with more than eight nodes. While the recent High-Node Count HyperTransport specification overcomes this limitation, recently launched twelve-core Magny-Cours processors have already inherited it and provide only 3 bits to encode the pointers used by the directory cache which they include to increase the scalability of their coherence protocol. In this work, we propose and develop an external device to extend the coherence domain of Magny-Cours processors beyond the 8-node limit while maintaining the advantages provided by the directory cache. Evaluation results for systems with up to 32 nodes show that the performance offered by our solution scales with the number of nodes, enhancing the directory cache effectiveness by filtering additional messages. Particularly, we reduce execution time by 47 percent in a 32-die system with respect to the 8-die Magny-Cours configuration. This work was supported by the Spanish MICINN, Consolider Programme and Plan E funds, as well as European Commission FEDER funds, under Grants CSD2006-00046 and TIN2009-14475-C04-01/03. It was also partly supported by (PROMETEO from Generalitat Valenciana (GVA) under Grant PROMETEO/2008/060). Ros Bardisa, A.; Cuesta Sáez, BA.; Fernández-Pascual, R.; Gómez Requena, ME.; Acacio Sánchez, ME.; Robles Martínez, A.; García Carrasco, JM. (2012). Extending magny-cours cache coherence. IEEE Transactions on Computers. 61(5):593-606. https://doi.org/10.1109/TC.2011.65 S 593 606 61 5