Wafer-level chip-scale packaging for low-end RF products

This paper gives a short overview of waferlevel chip-scale packaging technology and analyses its added value in the packaging of RF ICs. Particularly, the possibilities of substrate crosstalk suppression by substrate thinning and trenching together with embedding of rf passives (inductors, antennas)...

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Bibliographic Details
Main Authors: Bartek, M., Zilmer, G., Teomin, D., Polyakov, A., Sinaga, S. M., Mendes, P. M., Burghartz, J. N.
Format: Conference Object
Language:English
Published: IEEE 2004
Subjects:
Wafer level packaging WLP
Chip scale packaging CSP
System-on-chip Soc
Embedded passives
Crosstalk suppression
Blue whale
Online Access:http://hdl.handle.net/1822/1647
Description
Summary:This paper gives a short overview of waferlevel chip-scale packaging technology and analyses its added value in the packaging of RF ICs. Particularly, the possibilities of substrate crosstalk suppression by substrate thinning and trenching together with embedding of rf passives (inductors, antennas) are addressed. The Shellcasetype wafer-level packaging solution is used as a study case presenting its fabrication aspects and its potential for RF IC packaging. Philips Semiconductors and Philips Research, Fundação para a Ciência e Tecnologia (FCT) - (SFRH/BD/4717/2001, POCTI/ESE/38468/2001), European Union under FP5 for the project Blue Whale ...

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