A runtime-scalable and hardware-accelerated approach to on-board linear unmixing of hyperspectral images

• Published in: Remote Sensing
• Main Authors: Ortiz, Alberto, Guerra Hernández, Raúl Celestino, Lopez, Sebastian, Otero, Andrés, Sarmiento Rodríguez, Roberto, de la Torre, Eduardo, Rodríguez, Alfonso
• Other Authors: 57204770113, 56972626600, 56333613300, 57187722000, 35868116400, 35609452100, 6603668216, 29777603, 31468442, 2216671, 465777, 298843, 116294, 626981, WOS:Ortiz, A, WOS:Rodriguez, Alfonso, WOS:Guerra, R, WOS:Lopez, S, WOS:Otero, A, WOS:Sarmiento, R, WOS:de la Torre, E, BU-TEL
• Format: Article in Journal/Newspaper
• Language: English
• Published: 2018
• Subjects: 3307 Tecnología electrónica; Parallel Implementation; Fast Algorithm; Classification; Capabilities; Compression; Satellites; Hybrid; Chain; Hyperspectral Imaging; Linear Unmixing; Fpgas; On-Board Processing; Artico(3); artico
• Online Access: http://hdl.handle.net/10553/54963; https://doi.org/10.3390/rs10111790

Space missions are facing disruptive innovation since the appearance of small, lightweight, and low-cost satellites (e.g., CubeSats). The use of commercial devices and their limitations in cost usually entail a decrease in available on-board computing power. To face this change, the on-board processing paradigm is advancing towards the clustering of satellites, and moving to distributed and collaborative schemes in order to maintain acceptable performance levels in complex applications such as hyperspectral image processing. In this scenario, hybrid hardware/software and reconfigurable computing have appeared as key enabling technologies, even though they increase complexity in both design and run time. In this paper, the ARTICo(3) framework, which abstracts and eases the design and run-time management of hardware-accelerated systems, has been used to deploy a networked implementation of the Fast UNmixing (FUN) algorithm, which performs linear unmixing of hyperspectral images in a small cluster of reconfigurable computing devices that emulates a distributed on-board processing scenario. Algorithmic modifications have been proposed to enable data-level parallelism and foster scalability in two ways: on the one hand, in the number of accelerators per reconfigurable device; on the other hand, in the number of network nodes. Experimental results motivate the use of ARTICo(3)-enabled systems for on-board processing in applications traditionally addressed by high-performance on-Earth computation. Results also show that the proposed implementation may be better, for certain configurations, than an equivalent software-based solution in both performance and energy efficiency, achieving great scalability that is only limited by communication bandwidth. 21 1,43 4,118 Q1 Q1 SCIE