Method for prefetching non-contiguous data structures

A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple pro...

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Main Authors: Blumrich, Matthias A, Chen, Dong, Coteus, Paul W, Gara, Alan G, Giampapa, Mark E, Heidelberger, Philip, Hoenicke, Dirk, Ohmacht, Martin, Steinmacher-Burow, Burkhard D, Takken, Todd E, Vranas, Pavlos M
Language:unknown
Published: 2023
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Online Access:http://www.osti.gov/servlets/purl/988154
https://www.osti.gov/biblio/988154
id ftosti:oai:osti.gov:988154
record_format openpolar
spelling ftosti:oai:osti.gov:988154 2023-07-30T04:07:15+02:00 Method for prefetching non-contiguous data structures Blumrich, Matthias A Chen, Dong Coteus, Paul W Gara, Alan G Giampapa, Mark E Heidelberger, Philip Hoenicke, Dirk Ohmacht, Martin Steinmacher-Burow, Burkhard D Takken, Todd E Vranas, Pavlos M 2023-01-23 application/pdf http://www.osti.gov/servlets/purl/988154 https://www.osti.gov/biblio/988154 unknown http://www.osti.gov/servlets/purl/988154 https://www.osti.gov/biblio/988154 97 MATHEMATICS AND COMPUTING 2023 ftosti 2023-07-11T08:49:05Z A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple perfecting for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefect rather than some other predictive algorithm. This enables hardware to effectively prefect memory access patterns that are non-contiguous, but repetitive. Other/Unknown Material The Pointers SciTec Connect (Office of Scientific and Technical Information - OSTI, U.S. Department of Energy)
institution Open Polar
collection SciTec Connect (Office of Scientific and Technical Information - OSTI, U.S. Department of Energy)
op_collection_id ftosti
language unknown
topic 97 MATHEMATICS AND COMPUTING
spellingShingle 97 MATHEMATICS AND COMPUTING
Blumrich, Matthias A
Chen, Dong
Coteus, Paul W
Gara, Alan G
Giampapa, Mark E
Heidelberger, Philip
Hoenicke, Dirk
Ohmacht, Martin
Steinmacher-Burow, Burkhard D
Takken, Todd E
Vranas, Pavlos M
Method for prefetching non-contiguous data structures
topic_facet 97 MATHEMATICS AND COMPUTING
description A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple perfecting for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefect rather than some other predictive algorithm. This enables hardware to effectively prefect memory access patterns that are non-contiguous, but repetitive.
author Blumrich, Matthias A
Chen, Dong
Coteus, Paul W
Gara, Alan G
Giampapa, Mark E
Heidelberger, Philip
Hoenicke, Dirk
Ohmacht, Martin
Steinmacher-Burow, Burkhard D
Takken, Todd E
Vranas, Pavlos M
author_facet Blumrich, Matthias A
Chen, Dong
Coteus, Paul W
Gara, Alan G
Giampapa, Mark E
Heidelberger, Philip
Hoenicke, Dirk
Ohmacht, Martin
Steinmacher-Burow, Burkhard D
Takken, Todd E
Vranas, Pavlos M
author_sort Blumrich, Matthias A
title Method for prefetching non-contiguous data structures
title_short Method for prefetching non-contiguous data structures
title_full Method for prefetching non-contiguous data structures
title_fullStr Method for prefetching non-contiguous data structures
title_full_unstemmed Method for prefetching non-contiguous data structures
title_sort method for prefetching non-contiguous data structures
publishDate 2023
url http://www.osti.gov/servlets/purl/988154
https://www.osti.gov/biblio/988154
genre The Pointers
genre_facet The Pointers
op_relation http://www.osti.gov/servlets/purl/988154
https://www.osti.gov/biblio/988154
_version_ 1772820472289820672