M.R.Sangameswari. (2015). Low Power Design of Johnson Counter Using DDFF Featuring Dual Mode Logic. International Journal of Computer Science and Engineering Communications.
Chicago Style (17th ed.) CitationM.R.Sangameswari. Low Power Design of Johnson Counter Using DDFF Featuring Dual Mode Logic. International Journal of Computer Science and Engineering Communications, 2015.
MLA (9th ed.) CitationM.R.Sangameswari. Low Power Design of Johnson Counter Using DDFF Featuring Dual Mode Logic. International Journal of Computer Science and Engineering Communications, 2015.
Warning: These citations may not always be 100% accurate.