Address Code and Arithmetic Optimizations for Embedded Systems

An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive compu-tations on large data sets. These data sets get to be typically stored in main memory, which means that the compiler needs to gener-ate the address of a memory location in or...

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http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2002/aspdac02/pdffiles/07b_2.pdf
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spelling ftciteseerx:oai:CiteSeerX.psu:10.1.1.523.9614 2023-05-15T18:32:45+02:00 Address Code and Arithmetic Optimizations for Embedded Systems The Pennsylvania State University CiteSeerX Archives application/pdf http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.523.9614 http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2002/aspdac02/pdffiles/07b_2.pdf en eng http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.523.9614 http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2002/aspdac02/pdffiles/07b_2.pdf Metadata may be used without restrictions as long as the oai identifier remains attached to it. http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2002/aspdac02/pdffiles/07b_2.pdf text ftciteseerx 2016-01-08T10:16:20Z An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive compu-tations on large data sets. These data sets get to be typically stored in main memory, which means that the compiler needs to gener-ate the address of a memory location in order to store these data elements and generate the same address again when they are sub-sequently retrieved. This memory address computation is quite expensive, and if it is not performed efficiently, the performance degrades significantly. In this paper, we have developed a new compiler approach for optimizing the memory performance of sub-scripted or array variables and their address generation in stencil problems that are common in embedded image processing and other applications. Our approach makes use of the observation that in all these stencils, most of the elements accessed are stored close to one other in memory. We try to optimize the stencil codes with a view of reducing both the arithmetic and the address computation overhead. The regularity of the access pattern and the reuse of data elements between successive iterations of the loop body means that there is a common sub-expression between any two successive iterations; these common sub-expressions are difficult to detect using state-of-the-art compiler technology. If we were to store the value of the common sub-expression in a scalar, then for the next iteration, the value in this scalar could be used instead of performing the compu-tation all over again. This greatly reduces the arithmetic overhead. Since we store only one scalar in a register, there is almost no reg-ister pressure. Also all array accesses are now replaced by pointer dereferences, where the pointers are incremented after each itera-tion. This reduces the address computation overhead. Our solution is the only one so far to exploit both scalar conversion and common sub-expressions. Extensive experimental results on several codes show that our approach performs better than the other ... Text The Pointers Unknown
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description An important class of problems used widely in both the embedded systems and scientific domains perform memory intensive compu-tations on large data sets. These data sets get to be typically stored in main memory, which means that the compiler needs to gener-ate the address of a memory location in order to store these data elements and generate the same address again when they are sub-sequently retrieved. This memory address computation is quite expensive, and if it is not performed efficiently, the performance degrades significantly. In this paper, we have developed a new compiler approach for optimizing the memory performance of sub-scripted or array variables and their address generation in stencil problems that are common in embedded image processing and other applications. Our approach makes use of the observation that in all these stencils, most of the elements accessed are stored close to one other in memory. We try to optimize the stencil codes with a view of reducing both the arithmetic and the address computation overhead. The regularity of the access pattern and the reuse of data elements between successive iterations of the loop body means that there is a common sub-expression between any two successive iterations; these common sub-expressions are difficult to detect using state-of-the-art compiler technology. If we were to store the value of the common sub-expression in a scalar, then for the next iteration, the value in this scalar could be used instead of performing the compu-tation all over again. This greatly reduces the arithmetic overhead. Since we store only one scalar in a register, there is almost no reg-ister pressure. Also all array accesses are now replaced by pointer dereferences, where the pointers are incremented after each itera-tion. This reduces the address computation overhead. Our solution is the only one so far to exploit both scalar conversion and common sub-expressions. Extensive experimental results on several codes show that our approach performs better than the other ...
author2 The Pennsylvania State University CiteSeerX Archives
format Text
title Address Code and Arithmetic Optimizations for Embedded Systems
spellingShingle Address Code and Arithmetic Optimizations for Embedded Systems
title_short Address Code and Arithmetic Optimizations for Embedded Systems
title_full Address Code and Arithmetic Optimizations for Embedded Systems
title_fullStr Address Code and Arithmetic Optimizations for Embedded Systems
title_full_unstemmed Address Code and Arithmetic Optimizations for Embedded Systems
title_sort address code and arithmetic optimizations for embedded systems
url http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.523.9614
http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2002/aspdac02/pdffiles/07b_2.pdf
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